1. Field of the Invention
The present invention relates generally to a MOS semiconductor device, and more particularly to a MOS semiconductor device having a structure suitable for miniaturization.
2. Description of the Related Art
As a MOS transistor suitable for miniaturization, there is known a MOS transistor having an LDD (Lightly Doped Drain) structure. FIG. 1 shows an example of this type of transistor. A pair of N-type regions 12 and 13 with a high impurity concentration are formed on a surface region of, for example, a P-type semiconductor region 11. A pair of N-type regions 14 and 15 with a low impurity concentration are formed between the N-type regions 12 and 13 such that regions 14 and 15 are put in contact with regions 12 and 13, respectively.
The impurity concentration of the N-type regions 1 and 15 is low, and the diffusion depth thereof is small. By virtue of these features, a short channel effect can be suppressed, and a source-drain breakdown voltage can be enhanced. In addition, the gate electrode can be advantageously reduced in size.
In the MOS transistor having the above structure, however, if the effective channel length is reduced to less than about 0.5 .mu.m, the short channel effect and source-drain breakdown voltage are deteriorated.